Title
On the design of low-voltage, low-power CMOS analog multipliers for RF applications
Abstract
Novel low-voltage, low-power techniques in the design of portable wireless communication systems are required. Two system examples of low-power analog multipliers operating from a 1.2 V supply are presented. These proposed structures achieve the required multiplication function by using current processing. The circuits were fabricated using standard double-poly CMOS processes for a 900 MHz application. Measurement results of the prototypes are comparable to other higher voltage designs.
Year
DOI
Venue
2002
10.1109/92.994995
IEEE Trans. VLSI Syst.
Keywords
Field
DocType
novel low-voltage,low-power technique,mhz application,portable wireless communication system,v supply,low-power cmos analog multiplier,low-power analog,required multiplication function,rf application,measurement result,higher voltage design,current processing,stacking,circuits,radio frequency,voltage,low voltage,low power electronics,transceivers,limiting,analog multiplier,cmos technology
Analog multiplier,Computer science,Voltage,Circuit design,Electronic engineering,CMOS,Low voltage,Electronic circuit,Electrical engineering,Integrated circuit,Low-power electronics
Journal
Volume
Issue
ISSN
10
2
1063-8210
Citations 
PageRank 
References 
5
0.73
10
Authors
3
Name
Order
Citations
PageRank
Carl James Debono13811.66
Franco Maloberti2686144.70
Joseph Micallef361.13