Title
Systolic array architecture implementing Berlekamp-Massey-Sakata algorithm for decoding codes on a class of algebraic curves
Abstract
We construct a two-dimensional systolic array implementing the Berlekamp-Massey-Sakata (BMS) algorithm to provide error-locator polynomials for codes on selected algebraic curves. This array is constructed by introducing some new polynomials in order to increase the parallelism of the algorithm. The introduced polynomials are used in the majority logic scheme by Sakata et al. to correct errors up to the designed minimum distance without affecting its high speed. The arrangement of the nearest local connection of processing units in the systolic array is obtained for the general case. Furthermore, shortened systolic arrays that reduce the circuit scale and have the same function are constructed with only a slight modification of the connections and controls; this enables the adjustment of the circuit scale for different types of systems.
Year
DOI
Venue
2005
10.1109/TIT.2005.856950
IEEE Transactions on Information Theory
Keywords
Field
DocType
minimum distance,systolic array architecture,shortened systolic array,berlekamp-massey-sakata algorithm,two-dimensional systolic array,high speed,different type,general case,decoding code,algebraic curve,systolic array,majority logic scheme,circuit scale,error-locator polynomial,parallel algorithms,decoding
Discrete mathematics,Polynomial,Algebraic curve,Computer science,Parallel algorithm,Algorithm,Systolic array,Error detection and correction,Decoding methods,Gröbner basis,Berlekamp–Massey algorithm
Journal
Volume
Issue
ISSN
51
11
0018-9448
Citations 
PageRank 
References 
3
0.54
9
Authors
4
Name
Order
Citations
PageRank
Hajime Matsui1188.14
S. Sakata271.45
M. Kurihara330.54
S. Mita4182.34