Name
Abstract | ||
|---|---|---|
This paper presents an all-digital Gaussian frequency shift keying (GFSK) demodulator with robust clock data recovery (CDR) for low-intermediate-frequency (low-IF) receivers in wireless sensor networks (WSN). The proposed demodulator can detect and adapt to the intermediate frequency of the received signal automatically. In addition, the CDR can tolerate the frequency deviation of the input clock. An implementation of the demodulator with CDR is realized with HJTC 0.18 ¼m CMOS technology. The chip is designed for GFSK signals with a center frequency of 200 kHz, a modulation index of 1 and a data rate of 100 kbps. Experimental results show that the chip consumes 0.53 mA from a 1.8 V power supply, and only a 11 dB input signal to noise ratio (SNR) is required for 10-3 bit error rate (BER). The tolerance range for IF offset is \pm12.5% at 11 dB input SNR, and the CDR can tolerate frequency deviation of the input clock of \pm0.1%. |
Year | DOI | Venue |
|---|---|---|
2012 | 10.1145/2206781.2206813 | ACM Great Lakes Symposium on VLSI |
Keywords | Field | DocType |
db input signal,all-digital gaussian frequency shift,robust clock data recovery,frequency deviation,intermediate frequency,center frequency,low-power all-digital gfsk demodulator,db input,input clock,gfsk signal,proposed demodulator,signal to noise ratio,low if receiver,chip,bit error rate,wireless sensor network | Demodulation,Modulation index,Intermediate frequency,Computer science,Signal-to-noise ratio,Frequency deviation,Real-time computing,Electronic engineering,Low IF receiver,Center frequency,Bit error rate | Conference |
Citations | PageRank | References |
3 | 0.77 | 7 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Pengpeng Chen | 1 | 123 | 17.75 |
| Bo Zhao | 2 | 106 | 9.25 |
| Rong Luo | 3 | 233 | 24.75 |
| Huazhong Yang | 4 | 2239 | 214.90 |