Title | ||
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Effective design-for-testability techniques for H.264 all-binary integer motion estimation. |
Abstract | ||
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H.264 is the latest video compression standard with the highest coding efficiency, and the All-Binary Integer Motion Estimation algorithm (H.264-ABIME) is usually adopted for reducing the hardware area. There are many repeated modules in the H.264-ABIME block, thus the well-known Iterative-Logic-Array (ILA) architecture can be applied to test all the modules with constant number of test patterns. ... |
Year | DOI | Venue |
---|---|---|
2010 | 10.1049/iet-cds.2009.0353 | IET Circuits, Devices & Systems |
Keywords | Field | DocType |
automatic test pattern generation,built-in self test,data compression,design for testability,logic arrays,motion estimation,video coding | Design for testing,Automatic test pattern generation,Algorithmic efficiency,Algorithm,Electronic engineering,Binary Integer Decimal,Motion estimation,Data compression,Image compression,Mathematics,Built-in self-test | Journal |
Volume | Issue | ISSN |
4 | 5 | 1751-858X |
Citations | PageRank | References |
1 | 0.35 | 9 |
Authors | ||
4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Po-Yu Yeh | 1 | 4 | 1.14 |
Bo-Yuan Ye | 2 | 18 | 2.73 |
Sy-Yen Kuo | 3 | 2304 | 245.46 |
Ing-Yi Chen | 4 | 215 | 23.61 |