Title
The instruction systolic array, a parallel architecture for VLSI
Abstract
A new parallel architecture is presented that is more flexible than the systolic array: the Instruction Systolic Array (ISA). In the ISA the instructions (instead of data, as in a systolic array) are pumped through an array of processors. While systolic arrays are special purpose architectures, the ISA is more universal: It is capable of executing different programs. The Instruction Systolic Array is well suited for implementation in VLSI technology.
Year
DOI
Venue
1986
10.1016/0167-9260(86)90038-6
Integration
Keywords
Field
DocType
systolic array,vlsi,mesh-connected processor array,computer architectures,parallel architecture,instruction systolic array
Architecture,Computer architecture,MISD,Computer science,Systolic array,Integrated circuit,Very-large-scale integration,Parallel architecture
Journal
Volume
Issue
ISSN
4
1
Integration, the VLSI Journal
Citations 
PageRank 
References 
18
3.41
2
Authors
1
Name
Order
Citations
PageRank
H. -W. Lang1479.32