Name
Abstract | ||
|---|---|---|
Deterministic logic BIST (DLBIST) is an attractive test strategy, since it combines advantages of deterministic external testing and pseudo-random LBIST. Unfortunately, previously published DLBIST methods are unsuited for large ICs, since computing time and memory consumption of the DLBIST synthesis algorithms increase exponentially, or at least cubically, with the circuit size. In this paper, we propose a novel DLBIST synthesis procedure that has nearly linear complexity in terms of both computing time and memory consumption. The new algorithms are based on binary decision diagrams (BDDs). We demonstrate the efficiency of the new algorithms for industrial designs up to 2M gates. |
Year | DOI | Venue |
|---|---|---|
2004 | 10.1109/ITC.2004.66 | ITC |
Keywords | Field | DocType |
efficient pattern mapping,deterministic logic bist,novel dlbist synthesis procedure,dlbist synthesis algorithms increase,binary decision diagram,computing time,circuit size,deterministic logic,memory consumption,logic bist,dlbist method,new algorithm,bdds,attractive test strategy,circuit complexity,industrial design | Boolean circuit,Circuit complexity,Logic testing,Computer science,Logic optimization,Binary decision diagram,Electronic engineering,Linear complexity,Test strategy,Built-in self-test | Conference |
ISSN | ISBN | Citations |
1089-3539 | 0-7803-8581-0 | 25 |
PageRank | References | Authors |
1.01 | 15 | 6 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Valentin Gherman | 1 | 36 | 3.35 |
| Hans-Joachim Wunderlich | 2 | 1822 | 155.30 |
| Harald P. E. Vranken | 3 | 120 | 7.70 |
| Friedrich Hapke | 4 | 244 | 14.61 |
| Michael Wittke | 5 | 118 | 5.12 |
| Michael Garbers | 6 | 25 | 1.01 |