Name
Title | ||
|---|---|---|
RDIS: A recursively defined invertible set scheme to tolerate multiple stuck-at faults in resistive memory |
Abstract | ||
|---|---|---|
With their potential for high scalability and density, resistive memories are foreseen as a promising technology that overcomes the physical limitations confronted by charge-based DRAM and flash memory. Yet, a main burden towards the successful adoption and commercialization of resistive memories is their low cell reliability caused by process variation and limited write endurance. Typically, faulty and worn-out cells are permanently stuck at either ‘0’ or ‘1’. To overcome the challenge, a robust error correction scheme that can recover from many hard faults is required. In this paper, we propose and evaluate RDIS, a novel scheme to efficiently tolerate memory stuck-at faults. RDIS allows for the correct retrieval of data by recursively determining and efficiently keeping track of the positions of the bits that are stuck at a value different from the ones that are written, and then, at read time, by inverting the values read from those positions. RDIS is characterized by a very low probability of failure that increases slowly with the relative increase in the number of faults. Moreover, RDIS tolerates many more faults than the best existing scheme-by up to 95% on average at the same overhead level. |
Year | DOI | Venue |
|---|---|---|
2012 | 10.1109/DSN.2012.6263949 | DSN |
Keywords | Field | DocType |
invertible set scheme,resistive memory,correct retrieval,memory stuck-at fault,multiple stuck-at fault,charge-based dram,novel scheme,robust error correction scheme,existing scheme-by,low probability,low cell reliability,flash memory,fault tolerance,process variation,reliability,hardware,set theory,error correction code,phase change memory,computer architecture,radiation detectors,noise measurement,probability,data retrieval,error correction | Dram,Phase-change memory,Flash memory,Computer science,Error detection and correction,Real-time computing,Fault tolerance,Process variation,Resistive random-access memory,Scalability | Conference |
ISSN | Citations | PageRank |
1530-0889 | 22 | 1.00 |
References | Authors | |
16 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Rami Melhem | 1 | 2537 | 164.09 |
| Rakan Maddah | 2 | 67 | 4.92 |
| Sangyeun Cho | 3 | 1294 | 73.92 |