Paper Info
Title
Design of Fractal Image Compression on SOC
Abstract
The technological revolution during the last years has carried out a great evolution especially in the multimedia domain. Nowadays, almost everyone benefits from various video applications such as TV broadcasting and video conferencing. This progress involves particularly an increase in the capacity of digital data transmission. As a result, data compression became increasingly significant for storage and transmission. In this paper, we present an algorithm for fractal image compression based on SOC in real time. The algorithm consists of a hardware and software part. The hardware part supports an expensive calculation; therefore it is conceived on RTL level. The coding algorithm was implemented on the Altera chart STRATIX-I. The functional blocks were implemented with clock rate of 410 MHz with a maximum flow data input of 13.2 Gbit/s.
Year
DOI
Venue
2008
10.1109/ISVLSI.2008.26
ISVLSI
Keywords
Field
DocType
various video application,software part,fractal image compression,digital data transmission,altera chart,data compression,maximum flow data input,video conferencing,coding algorithm,hardware part,data transmission,real time systems,computer architecture,hardware,soc,maximum flow,real time,video compression,videoconference,fpga,system on chip,fractals
Broadcasting,System on a chip,Fractal compression,Computer science,Field-programmable gate array,Real-time computing,Software,Videoconferencing,Data compression,Clock rate
Conference
Citations 
PageRank 
References 
0
0.34
2
Authors
3
Name
Order
Citations
PageRank
A. Jedidi100.34
B. Rejeb200.34
Abid Mohamed33919.08