Paper Info
Title
Caching Single-Assignment Structures to Build a Robust Fine-Grain Multi-Threading System
Abstract
We present the design, implementation, and evaluation of single assignment data structures and of a software controlled cache in an existing multi-threaded architecture platform -- the Efficient Architecture for Running Threads (EARTH). The software-controlled cache (ISSC) exploits temporal and spatial locality of EARTH split-phased memory transactions for single-assignment memory references. Our experimental evaluation indicates that the caching mechanism for single-assignment storage makes the EARTH memory system more robust to variations in the latency of memory operations. As a consequence the system can be ported to a wider range of machine platforms and deliver speedup for both regular and irregular application.
Year
DOI
Venue
2000
10.1109/IPDPS.2000.846039
IPDPS
Keywords
Field
DocType
single-assignment memory reference,caching mechanism,earth split-phased memory transaction,experimental evaluation,software-controlled cache,existing multi-threaded architecture platform,single-assignment storage,efficient architecture,memory operation,earth memory system,robust fine-grain multi-threading system,caching single-assignment structures,computer architecture,data structures,operating systems,multi threading,data structure,multithreading,robustness,application software,earth,temporal locality
Interleaved memory,Locality of reference,Uniform memory access,Shared memory,Computer science,Parallel computing,Cache-only memory architecture,Non-uniform memory access,Cache coloring,Memory map,Distributed computing
Conference
ISBN
Citations 
PageRank 
0-7695-0574-0
3
0.42
References 
Authors
5
4
Name
Order
Citations
PageRank
Wen-Yen Lin15811.47
Jean-Luc Gaudiot2938121.51
Jose Nelson Amaral37012.40
Guang R. Gao42661265.87