Name
Abstract | ||
|---|---|---|
Retiming is a widely investigated technique for performance optimization. In general, it performs extensive modifications on a circuit netlist, leaving it unclear, whether the achieved performance improvement will still be valid after placement has been performed. This paper presents an approach for integrating retiming into a timing-driven placement environment. The experimental results show the benefit of the proposed approach on circuit performance in comparison with design flows using retiming only as a pre- or post- placement optimization method. |
Year | DOI | Venue |
|---|---|---|
2001 | 10.1109/ISCAS.2001.922057 | ISCAS (5) |
Keywords | Field | DocType |
cmos technology,semiconductor device modeling,retiming,simulated annealing,design flow,tight coupling,registers,computer science | Simulated annealing,Netlist,Retiming,Computer science,Circuit extraction,Electronic engineering,Design flow,Circuit performance,Coupling (computer programming),Performance improvement | Conference |
Citations | PageRank | References |
2 | 0.40 | 13 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Ingmar Neumann | 1 | 30 | 6.56 |
| Wolfgang Kunz | 2 | 236 | 33.71 |