Name
Abstract | ||
|---|---|---|
This paper addresses problems that arise while checking the equivalence of two Boolean functions under arbi- trary input permutations. The permutation problem has several applications in the synthesis and verification of combinational logic: It arises in the technology mapping stage of logic synthe- sis and in logic verification. A popular method to solve it is to compute a signature for each variable that helps to establish a correspondence between the variables. Several researchers have suggested a wide range of signatures that have been used for this purpose. However, for each choice of signature, there remain variables that cannot be uniquely identified. Our research has shown that, for a given example, this set of problematic variables tends to be the same - regardless of the choice of signatures. The paper investigates this problem. |
Year | DOI | Venue |
|---|---|---|
2002 | 10.1023/A:1016091418702 | Formal Methods in System Design |
Keywords | DocType | Volume |
logic verification,boolean function,combinational logic,permutation problem,technology mapping stage,permutation independent boolean comparison,arbitrary input permutation,problematic variable,reduced ordered binary decision diagram,paper addresses problem,high level design tools,popular method,synthesis and verification,logic synthesis | Journal | 21 |
Issue | ISSN | ISBN |
2 | 1572-8102 | 0-89791-766-9 |
Citations | PageRank | References |
28 | 1.49 | 9 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Janett Mohnke | 1 | 91 | 7.03 |
| P. Molitor | 2 | 211 | 18.50 |
| Sharad Malik | 3 | 7766 | 691.24 |