Name
Title | ||
|---|---|---|
Automated synthesis of pipelined designs on FPGAs for signal and image processing applications described in MATLAB |
Abstract | ||
|---|---|---|
We present a compiler that takes high level algorithms described in MATLAB and generates an optimized hardware for an FPGA with external memory. A framework is described to detect and exploit opportunities to pipeline loops in an optimal way. Effectiveness of the framework is demonstrated by synthesizing some image and signal processing applications. Starting from the MATLAB description of the applications, hardware is synthesized that runs on a Xilinx XC4028. The synthesized designs are equivalent to manually optimized designs in performance. |
Year | DOI | Venue |
|---|---|---|
2001 | 10.1145/370155.370572 | Yokohama |
Keywords | DocType | ISBN |
image processing application,signal processing application,xilinx xc4028,pipeline loop,external memory,optimized hardware,matlab description,automated synthesis,synthesized design,optimized design,pipelined design,high level,cores,image processing,compiler,field programmable gate arrays,finite impulse response filter,fpga,high level synthesis,intellectual property,algorithm design and analysis,optimal design,signal and image processing,hardware,system on a chip,signal processing | Conference | 0-7803-6634-4 |
Citations | PageRank | References |
5 | 0.94 | 7 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Malay Haldar | 1 | 98 | 10.78 |
| Anshuman Nayak | 2 | 96 | 10.31 |
| Alok Choudhary | 3 | 8 | 1.64 |
| Prith Banerjee | 4 | 255 | 23.94 |