Abstract | ||
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As the density of memory chips increases, the probability of having defective components is also increased. It would be impossible for us to repair a memory device if it has numerous defects that cannot be dealt with properly. However, in case of a small number of defects, it is desirable to reuse a defective die (standard unit measuring a device on a wafer) after repair rather than to discard it, because reuse is an essential element for memory device manufactures to cut costs effectively. To perform the reuse, laser-repair process and redundancy analysis for setting an accurate target in the laser-repair process is needed. In this paper new approach for the repair of large random access memory (RAM) devices in which redundant rows and columns are added as spares. So, cost reduction was attempted by reducing time in carrying out a new type of redundancy analysis after simulating each defect. |
Year | DOI | Venue |
---|---|---|
2004 | 10.1007/978-3-540-30585-9_79 | AsiaSim |
Keywords | Field | DocType |
laser-repair process,memory device,spare row,new type,yield improvement,defective component,large random access memory,redundancy analysis,memory cell,defective die,accurate target,paper new approach,memory chips increase,chip,cost effectiveness | Row and column spaces,Memory chip,Spare part,Engineering drawing,Reuse,Simulation,Redundancy (engineering),Engineering,Very-large-scale integration,Cost reduction,Reliability engineering,Random access | Conference |
Volume | ISSN | ISBN |
3398 | 0302-9743 | 3-540-24477-8 |
Citations | PageRank | References |
9 | 1.07 | 8 |
Authors | ||
3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Youngshin Han | 1 | 27 | 8.28 |
Dongsik Park | 2 | 13 | 2.76 |
Chil-Gee Lee | 3 | 47 | 16.85 |