Name
Abstract | ||
|---|---|---|
This paper proposes a cosimulation methodology that results in an efficient SoC design as well as fast verification by integrating HDL, System-C, and algorithm-level abstraction using the design tools Active-RDL and Matlab Simulink. To demonstrate the proposed design methodology, we implemented the design technique on a serial connection muld-channel speaker system. We have demonstrated the proposed cosimulation method utilizing an ARM processor-based SoC Master Board with the AMBA bus interface and a Xitinx Vertex4 FPGA. The proposed method has the advantage of simultaneous simulation verification of both software and hardware parts in high levels of abstraction mixed with some performance- critical parts in more concrete RTL codes. This allows relatively fast and easy design of a speaker connection system which typically requires significant amount of data processing for verification. |
Year | DOI | Venue |
|---|---|---|
2006 | 10.1109/APCCAS.2006.342309 | 2006 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS |
Keywords | Field | DocType |
cosimulation, SoC, serial connection, speaker, acoustic signal processing | ARM architecture,Data processing,System on a chip,Computer science,Serial port,Field-programmable gate array,Design methods,Software,Hardware description language,Embedded system | Conference |
Citations | PageRank | References |
0 | 0.34 | 1 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Moonvin Song | 1 | 3 | 0.77 |
| Yunmo Chung | 2 | 37 | 9.15 |