Name
Abstract | ||
|---|---|---|
With the growing complexity of modern VLSI designs, functional verification has become one of the bottleneck meeting the time-to-market requirement. Despite the high number of courses offered in recent years in functional verification (FV), we could not find a course covering all aspects of FV, especially in training students gaining hands-on experience of both commercial and academic tools with industrial designs. In this paper, we describe the activities at the National University of Defense Technology (College of Computer Science & Technology) in providing a course for graduate students in FV. Our goal in designing this course is to provide a strong theoretically and practical background to students by covering all aspects of FV, and experience verification with practical designs. |
Year | DOI | Venue |
|---|---|---|
2007 | 10.1109/MSE.2007.38 | MSE |
Keywords | Field | DocType |
experiences teaching functional verification,electronic engineering education,academic tool,educational courses,defense technology,practical background,vlsi design,college of computer science & technology,functional verification,national university of defense technology,practical design,vlsi,integrated circuit design,graduate student,national university,computer science,hands-on experience,experience verification,industrial design,practical designs,functional verification techniques,hardware,very large scale integration,computational modeling,formal verification | Industrial design,Bottleneck,Functional verification,Software engineering,Computer science,Electronic engineering education,Time to market,Computer engineering,Very-large-scale integration,Formal verification | Conference |
ISBN | Citations | PageRank |
0-7695-2849-X | 0 | 0.34 |
References | Authors | |
2 | 5 | |