Name
Abstract | ||
|---|---|---|
In the age of Nanoscale Integration (NSI), state-of-the- art integrated circuits with gate length under 100 nm consist of hundreds of millions of transistors. This implies new challenges for their reliability. Novel NSI defect mechanisms require special test methods to sort out faulty chips. We present modeling approaches and efficient test algorithms for fundamental NSI defect mechanisms enabling the handling of industrial multi-million-gate circuits. |
Year | DOI | Venue |
|---|---|---|
2010 | 10.1524/itit.2010.0590 | IT-INFORMATION TECHNOLOGY |
Keywords | DocType | Volume |
B.8.1 [Hardware: Performance and Reliability: Reliability-Testing, and Fault-Tolerance], test, diagnosis, defect-based test, fault models, electronic design automation | Journal | 52 |
Issue | ISSN | Citations |
4 | 1611-2776 | 0 |
PageRank | References | Authors |
0.34 | 6 | 2 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Ilia Polian | 1 | 889 | 78.66 |
| Bernd Becker | 2 | 855 | 73.74 |