Abstract | ||
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This paper presents a pipelined successive approximation register analog-to-digital converter (SAR ADC) for bio-medical applications based on 65 nm CMOS technology. Without using op-amp, the proposed 9-bit pipelined SAR ADC can reduce the capacitance from 512C to 64C. The pipelined architecture can enhance the operation efficiency of the ADC and also save the digital power consumption in the SAR. The simulation results show that the total power of the ADC is 10.26 μW only, and the figure of merit (FOM) of the ADC is 28.3 fJ/conversion-step. ©2010 IEEE. |
Year | DOI | Venue |
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2010 | 10.1109/ICECS.2010.5724652 | ICECS |
Keywords | Field | DocType |
bio-medical applications,pipelined,sar adc,ultra-low power,cmos integrated circuits,figure of merit,low power electronics | Capacitance,Computer science,Shaping,Electronic engineering,Figure of merit,CMOS,Successive approximation ADC,Electrical engineering,Low-power electronics,Power consumption | Conference |
Volume | Issue | Citations |
null | null | 0 |
PageRank | References | Authors |
0.34 | 3 | 7 |
Name | Order | Citations | PageRank |
---|---|---|---|
Guohe Yin | 1 | 0 | 0.68 |
U. Fat Chio | 2 | 75 | 11.63 |
He-Gong Wei | 3 | 113 | 12.98 |
Sai-Weng Sin | 4 | 440 | 64.51 |
Seng-Pan, U. | 5 | 472 | 74.17 |
Rui Paulo da Silva Martins | 6 | 642 | 127.35 |
Zhihua Wang | 7 | 0 | 2.37 |