Name
Abstract | ||
|---|---|---|
Abstract: CSP channels are proposed as a means of developing high-level, asynchronous pipelinearchitectures over and above existing synchronous logic. Channel-based design allowshardware systems to be designed and constructed using top-down software engineeringmethods, which have not previously been available within hardware-software co-design. Theintention is to enhance support for future large-scale co-designs. The design methodologyand its performance implications are demonstrated through an... |
Year | DOI | Venue |
|---|---|---|
2003 | 10.1049/ip-sen:20030206 | IEE Proceedings - Software |
Keywords | Field | DocType |
communicating sequential processes,design methodology,top down | Asynchronous communication,Computer architecture,Silicon compiler,Computer science,Handel-C,Communicating sequential processes,Field-programmable gate array,Communication channel,Design methods,Compiler | Journal |
Volume | Issue | Citations |
150 | 1 | 0 |
PageRank | References | Authors |
0.34 | 9 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| R. P. Self | 1 | 17 | 1.79 |
| Martin Fleury | 2 | 380 | 57.38 |
| Andy Downton | 3 | 110 | 17.35 |