Name
Abstract | ||
|---|---|---|
Due to the increasing disparity between processor and main memory system cycle times, many computer systems are now incorporating two levels fo cache memory. Several studies have been done on the design and performance of second level caches, including [3] and [20]. It certainly can and has been shown that the addition of a second level of cache enhances the performance of many systems. |
Year | DOI | Venue |
|---|---|---|
1993 | 10.1145/155775.155782 | SIGMETRICS Performance Evaluation Review |
Keywords | Field | DocType |
computer system,level cache,cache memory,increasing disparity,main memory system cycle,cycle time | Cache pollution,Cache,Computer science,CPU cache,Parallel computing,Cache algorithms,Real-time computing,Cache coloring,Bus sniffing,Smart Cache,Cache coherence,Embedded system | Journal |
Volume | Issue | Citations |
20 | 4 | 3 |
PageRank | References | Authors |
0.44 | 14 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Robert B. Smith | 1 | 3 | 0.44 |
| James K. Archibald | 2 | 632 | 161.01 |
| Brent E. Nelson | 3 | 616 | 79.91 |