Name
Abstract | ||
|---|---|---|
In this paper, high-performance flip-flops are analyzed and classified into two categories: the conditional precharge and the conditional capture technologies. This classification is based on how to prevent or reduce the redundant internal switching activities. A new flip-flop is introduced: the conditional discharge flip-flop (CDFF). It is based on a new technology, known as the conditional discharge technology. This CDFF not only reduces the internal switching activities, but also generates less glitches at the output, while maintaining the negative setup time and small D-to-Q delay characteristics. With a data-switching activity of 37.5%, the proposed flip-flop can save up to 39% of the energy with the same speed as that for the fastest pulsed flip-flops. |
Year | DOI | Venue |
|---|---|---|
2004 | 10.1109/TVLSI.2004.826192 | IEEE Trans. VLSI Syst. |
Keywords | Field | DocType |
proposed flip-flop,high-performance flip-flop,low-power conditional discharge flip-flop,conditional capture technology,fastest pulsed flip-flop,new technology,internal switching activity,conditional discharge flip-flop,conditional discharge technology,conditional precharge,new flip-flop,glitches,master slave,power dissipation,very large scale integration,cmos technology,vlsi | Glitch,Sequential logic,Computer science,Real-time computing,CMOS,Electronic engineering,Master/slave,Flip-flop,Integrated circuit,Very-large-scale integration,Low-power electronics | Journal |
Volume | Issue | ISSN |
12 | 5 | 1063-8210 |
Citations | PageRank | References |
28 | 2.07 | 9 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Peiyi Zhao | 1 | 96 | 9.81 |
| Tarek K. Darwish | 2 | 28 | 2.07 |
| Magdy A. Bayoumi | 3 | 803 | 122.04 |