Name
Abstract | ||
|---|---|---|
An analog-to-digital converter suitable for compressive sensing applications is presented. The converter is based on an incremental sigma-delta converter architecture and is able to directly acquire and convert to digital format compressive sensing measurements. A switched-capacitor circuit is proposed for the converter's hardware implementation. Simulations at the system and transistor levels validate the approach. The converter occupies a small area of 0.047 mm2 on a target 0.5 μm CMOS process. Thus, several of them can be implemented in parallel to achieve high conversion rates. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1109/ISCAS.2011.5937617 | ISCAS |
Keywords | Field | DocType |
switched capacitor networks,cmos process,incremental sigma delta converter,cmos integrated circuits,sigma-delta modulation,switched-capacitor circuit,converter hardware implementation,compressive sensing,size 0.5 mum,capacitors,incremental sigma-delta converter architecture,compressed sensing,analog-to-digital converter,sensors,switched capacitor,sigma delta modulator,quantization,computer architecture | SINADR,Capacitor,Computer science,Control theory,Electronic engineering,Delta-sigma modulation,CMOS,Quantization (signal processing),Transistor,Buck converter,Compressed sensing | Conference |
ISSN | ISBN | Citations |
0271-4302 E-ISBN : 978-1-4244-9472-9 | 978-1-4244-9472-9 | 3 |
PageRank | References | Authors |
0.45 | 2 | 2 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Hsuan-Tsung Wang | 1 | 7 | 1.71 |
| Walter D. Leon | 2 | 69 | 13.94 |