Abstract | ||
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This paper investigates trellis structures of linear block codes for the integrated circuit (IC) implementation of Viterbi decoders capable of achieving high decoding speed while satisfying a constraint on the structural complexity of the trellis in terms of the maximum number of states at any particular depth. Only uniform sectionalizations of the code trellis diagram are considered. An upper-bou... |
Year | DOI | Venue |
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1997 | 10.1109/26.554286 | IEEE Transactions on Communications |
Keywords | Field | DocType |
Viterbi algorithm,Decoding,Block codes,High speed integrated circuits,Very large scale integration,State-space methods,Integrated circuit interconnections,Computational complexity,Societies,NASA | Trellis modulation,Convolutional code,Soft output Viterbi algorithm,Computer science,Block code,Algorithm,Viterbi decoder,Space–time trellis code,Linear code,Viterbi algorithm | Journal |
Volume | Issue | ISSN |
45 | 1 | 0090-6778 |
Citations | PageRank | References |
9 | 1.08 | 21 |
Authors | ||
3 |
Name | Order | Citations | PageRank |
---|---|---|---|
H. T. Moorthy | 1 | 29 | 3.60 |
S. Lin | 2 | 1280 | 124.59 |
G. T. Uehara | 3 | 9 | 1.08 |