Paper Info
Title
Efficient architecture for exponentiation and division in GF(2m) using irreducible AOP
Abstract
The important arithmetic operations over finite fields include exponentiation, division, and inversion. An exponentiation operation can be implemented using a series of squaring and multiplication operations over GF(2m) using a binary method, while division and inversion can be performed by the iterative application of an AB2 operation. Hence, it is important to develop a fast algorithm and efficient hardware for squaring, multiplication, and AB2 operations. The current paper presents new architectures for the simultaneous computation of multiplication and squaring operations, and the computation of an AB2 operation over GF(2m) generated by an irreducible AOP of degree m. The proposed architectures offer a significant improvement in reducing the hardware complexity compared with previous architectures, and can also be used as a kernel circuit for exponentiation, division, and inversion architectures. Furthermore, since the proposed architectures include regularity, modularity and concurrency, they can be easily designed on VLSI hardware and used in IC cards.
Year
Venue
Keywords
2003
international conference on computational science and its applications
exponentiation operation,inversion architecture,efficient architecture,irreducible AOP,multiplication operation,simultaneous computation,important arithmetic operation,AB2 operation,VLSI hardware,hardware complexity,efficient hardware,proposed architecture
Field
DocType
Volume
Finite field,Computer science,Arithmetic,Multiplication,Exponentiation by squaring,Very-large-scale integration,GF(2),Exponentiation,Binary number,Modular exponentiation
Conference
2667
ISSN
ISBN
Citations 
0302-9743
3-540-40155-5
0
PageRank 
References 
Authors
0.34
4
3
Name
Order
Citations
PageRank
Won-ho Lee173.53
Young-jun Heo242.52
keeyoung yoo31131120.89