Name
Abstract | ||
|---|---|---|
The varistructure architecture gives the user the opportunity to specify the height and width of his primary memory ``at run time.'' This architecture, first proposed in 1973, has now been simplified to make it schedulable, extended to allow SIMD vector-vector operations, and further extended to provide variable structure within a task. Memory is efficiently utilized in that memory bandwidth can be increased for array processing, yet memory space is not wasted during string processing. The fetch-execute cycle operation is analyzed herein, and some tentative results regarding input-output and data communication between processing entities are reported. On the basis of the simplicity of the fetch-execute cycle, there is hope that this architecture may well be the best way to build minicomputers and large computers using a cellular array of microprocessors. |
Year | DOI | Venue |
|---|---|---|
1977 | 10.1109/TC.1977.5009291 | Computers, IEEE Transactions |
Keywords | Field | DocType |
memory bandwidth,array processing,varistructured array,string processing,simd vector-vector operation,fetch-execute cycle,varistructure architecture,primary memory,fetch-execute cycle operation,memory space,cellular array,computer architecture,hardware,memory management,supercomputer,reconfigurable computing,input output,integrated circuits | Architecture,Array processing,Computer architecture,Memory bandwidth,Supercomputer,Computer science,Parallel computing,Minicomputer,SIMD,Memory management,Computer hardware,Integrated circuit | Journal |
Volume | Issue | ISSN |
26 | 2 | 0018-9340 |
Citations | PageRank | References |
12 | 4.55 | 10 |
Authors | ||
1 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| G. Jack Lipovski | 1 | 528 | 293.80 |