Title
Generating Checking Sequences for Partial Reduced Finite State Machines
Abstract
The problem of generating checking sequences for FSMs with distinguishing sequence has been attracting interest of researchers for several decades. In this paper, a solution is proposed for partial reduced FSMs with distinguishing sets, and either with or without reset feature. Sufficient conditions for a sequence to be a checking sequence for such FSMs are formulated. Based on these conditions, a method to generate checking sequence is elaborated. The results of an experimental comparison indicate that the proposed method produces shorter checking sequences than existing methods in most cases. The impact of using the reset feature on the length of checking sequence is also experimentally evaluated.
Year
DOI
Venue
2008
10.1007/978-3-540-68524-1_12
TestCom/FATES
Keywords
Field
DocType
finite state machine
Algorithm,Finite-state machine,Mathematics
Conference
Volume
ISSN
Citations 
5047
0302-9743
23
PageRank 
References 
Authors
0.88
12
2
Name
Order
Citations
PageRank
Adenilso Da Silva Simão121623.24
A. Petrenko256531.37