Name
Abstract | ||
|---|---|---|
In this paper, a complete X-tolerant test data compression solution is proposed for system-on-a-chip (SOC) testing. The solution achieves low-cost testing by employing not only selective Huffman vertical coding (SHVC) for test stimulus compression but also MISR-based time compactor for test response compaction. Moreover, the solution is non-intrusive, since it can tolerate any number of unknown states (also called X state) in test responses such that it does not require modifying the logic of core to eliminate or block the sources of unknown states. Furthermore, the solution achieves enhanced diagnosis capability over conventional MISR. The enhanced diagnosis requires the least hardware overhead by reusing the existing masking logic and achieves significant saving in diagnostic time. Experimental results for ISCAS 89 benchmarks as well as the evaluation of hardware implementation have proven the efficiency of the proposed test solution. |
Year | DOI | Venue |
|---|---|---|
2005 | 10.1093/ietisy/e88-d.7.1662 | IEICE Transactions |
Keywords | Field | DocType |
unknown state,enhanced diagnosis capability,complete x-tolerant test data,diagnosis capability,test stimulus compression,proposed test solution,misr-based time compactor,test response compaction,test response,x-tolerant test data compression,diagnostic time,compression solution | System on a chip,Masking (art),Pattern recognition,Computer science,Coding (social sciences),Test data compression,Huffman coding,Artificial intelligence,Data compression,Integrated circuit,Computer engineering,Embedded system | Journal |
Volume | Issue | ISSN |
E88-D | 7 | 1745-1361 |
Citations | PageRank | References |
1 | 0.35 | 0 |
Authors | ||
2 | ||