Abstract | ||
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We describe a new power-performance modeling toolkit, developed to aid in the evaluation and definition of future power-efficient, PowerPCTM processors. The base performance models in use in this project are: (a) a fast but cycle-accurate, parameterized research simulator and (b) a slower, pre-RTL reference model that models a specific high-end machine in full, latch-accurate detail. Energy characterizations are derived from real, circuit-level power simulation data. These are then combined to form higher-level energy models that are driven by microarchitecture-level parameters of interest. The overall methodology allows us to conduct power-performance tradeoff studies in defining the follow-on design points within a given product family. We present a few experimental results to illustrate the kinds of tradeoffs one can study using this tool. |
Year | DOI | Venue |
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2000 | 10.1007/3-540-44572-2_10 | PACS |
Keywords | Field | DocType |
base performance model,follow-on design point,high end microprocessor,future power-efficient,higher-level energy model,circuit-level power simulation data,new power-performance modeling toolkit,powerpctm processor,tradeoff analysis,power-performance modeling,energy characterization,power-performance tradeoff study,power efficiency | Power simulation,Parameterized complexity,Reference model,Simulation,CPU cache,Dissipation,Computer science,Microprocessor,Product family,Power performance,Computer engineering | Conference |
ISBN | Citations | PageRank |
3-540-42329-X | 21 | 2.13 |
References | Authors | |
9 | 4 |
Name | Order | Citations | PageRank |
---|---|---|---|
David Brooks | 1 | 5518 | 422.08 |
Margaret Martonosi | 2 | 8647 | 715.76 |
John-David Wellman | 3 | 344 | 36.97 |
Pradip Bose | 4 | 2790 | 210.58 |