Name
Abstract | ||
|---|---|---|
System on a chip design results in the integration of digi- tal, analog, and mixed-signal circuits on the same substrate which further complicates the already dicult validation problem. This paper presents a new model, labeled hybrid Petri nets (LHPNs), that is developed to be capable of mod- eling such a heterogeneous set of components. This paper also describes a compiler from VHDL-AMS to LHPNs. To support formal verification, this paper presents an ecient zone-based state space exploration algorithm for LHPNs. This algorithm uses a process known as warping to allow zones to describe continuous variables that may be chang- ing at variable rates. Finally, this paper describes the appli- cation of this algorithm to a couple of analog/mixed-signal circuit examples. |
Year | DOI | Venue |
|---|---|---|
2006 | 10.1145/1233501.1233556 | International Conference on Computer Aided Design |
Keywords | Field | DocType |
exploration algorithm,chip design result,difficult validation problem,mixed-signal circuit,hybrid petri nets,mixed-signal circuit example,continuous variable,formal verification,hybrid petri net,formal methods,heterogeneous set,efficient zone-based state space,logic design,state space,analog circuit,petri nets,system on a chip,formal method,variable rate | Logic synthesis,Petri net,Computer science,Compiler,Real-time computing,Mixed-signal integrated circuit,Formal methods,Electronic circuit,VHDL-AMS,Formal verification | Conference |
ISBN | Citations | PageRank |
1-59593-389-1 | 29 | 1.30 |
References | Authors | |
22 | 5 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Scott Little | 1 | 132 | 9.42 |
| Nicholas Seegmiller | 2 | 59 | 3.35 |
| David Walter | 3 | 98 | 5.38 |
| Chris J. Myers | 4 | 607 | 75.73 |
| Tomohiro Yoneda | 5 | 353 | 41.62 |