Name
Title | ||
|---|---|---|
Fast and accurate event-driven simulation of mixed-signal systems with data supplementation |
Abstract | ||
|---|---|---|
This paper presents a methodology of simulating behaviors of complex mixed-signal systems such as phase-locked loops (PLLs) and high-speed I/O interfaces on an event-driven HDL simulator like SystemVerilog. Continuous-time signal events as well as voltage and timing noises are accurately modeled without relying on fine time steps, based on a technique called data supplementation. That is, rather than representing a signal just as a series of time-value pairs, additional information is annotated using the struct construct in SystemVerilog. Prototype models for a 2-GHz PLL and a 2-Gbps high-speed series I/O system including a 2.9dB-loss channel at 1GHz demonstrate 50× and 80× faster simulation speeds, respectively, with the same or better accuracy compared with the conventional time-step based models. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1109/CICC.2011.6055330 | CICC |
Keywords | Field | DocType |
hardware description languages,data supplementation technique,pll,voltage model,phase locked loops,mixed analogue-digital integrated circuits,frequency 2 ghz,mixed signal system,loss 2.9 db,continuous time signal event,event driven simulation,event driven hdl simulator,timing noise model,circuit simulation,phase lock loop | Phase-locked loop,Computer science,struct,Voltage,Communication channel,Electronic engineering,Event driven simulation,Mixed-signal integrated circuit,SystemVerilog,Hardware description language | Conference |
ISSN | ISBN | Citations |
0886-5930 | 978-1-4577-0222-8 | 7 |
PageRank | References | Authors |
0.87 | 4 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Myeong-Jae Park | 1 | 42 | 5.77 |
| HanSeok Kim | 2 | 79 | 6.85 |
| Minbok Lee | 3 | 12 | 2.34 |
| Jaeha Kim | 4 | 382 | 51.63 |