Title
High-voltage LDMOS transistors fully compatible with a deep-submicron 0.35µm CMOS process
Abstract
This work presents the design of LDMOS transistors fully compatible with a standard CMOS process, only requiring mask layout manipulation. A conventional 0.35@mm CMOS process was elected to demonstrate the viability of the approach. The prototyped LDMOS transistor exhibits a breakdown voltage of 24V, which represents an improvement of 31% when compared with the high-voltage extended-drain NMOS available in the process library, while other static parameters remain in the same range. Furthermore, this solution enables the CMOS integration of a high-voltage pass-transistor, as a consequence of the formation of an isolated lightly doped p-type region inside the n-well.
Year
DOI
Venue
2007
10.1016/j.mejo.2006.09.015
Microelectronics Journal
Keywords
Field
DocType
cmos integration,mask layout manipulation,high-voltage pass-transistor,breakdown voltage,prototyped ldmos transistor,doped p-type region,process library,standard cmos process,ldmos transistor,high-voltage ldmos transistor,mm cmos process,high voltage,ldmos
LDMOS,NMOS logic,Electronic engineering,Breakdown voltage,CMOS,Engineering,Miniaturization,High voltage,MOSFET,Transistor,Electrical engineering
Journal
Volume
Issue
ISSN
38
1
Microelectronics Journal
Citations 
PageRank 
References 
1
0.39
1
Authors
5
Name
Order
Citations
PageRank
P. M. Santos110.39
Vitor Costa2274.27
M. C. Gomes310.39
Beatriz Borges432.48
Mário Lança522.08