Name
Title | ||
|---|---|---|
Programmable built-in self-testing of embedded RAM clusters in system-on-chip architectures |
Abstract | ||
|---|---|---|
Multiport memories are widely used as embedded cores in all communication system-on-chip devices. Due to their high complexity and very low accessibility, built-in self-test (BIST) is the most common solution implemented to test the different memories embedded in the system. This article presents a programmable BIST architecture based on a single microprogrammable BIST processor and a set of memory wrappers designed to simplify the test of a system containing a large number of distributed multiport memories of different sizes (number of bits, number of words), access protocols (asynchronous, synchronous), and timing. |
Year | DOI | Venue |
|---|---|---|
2003 | 10.1109/MCOM.2003.1232242 | IEEE Communications Magazine |
Keywords | Field | DocType |
single microprogrammable bist processor,multiport memory,common solution,large number,programmable built-in self-testing,built-in self-test,embedded core,access protocol,different memory,embedded ram cluster,programmable bist architecture,different size,system-on-chip architecture,system on chip,communication system,chip | Asynchronous communication,Cluster (physics),System on a chip,System testing,Read-write memory,Computer science,Application-specific integrated circuit,Computer hardware,Mobile telephony,Embedded system,Built-in self-test | Journal |
Volume | Issue | ISSN |
41 | 9 | 0163-6804 |
Citations | PageRank | References |
32 | 1.16 | 0 |
Authors | ||
5 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| A. Benso | 1 | 148 | 12.69 |
| S. Di Carlo | 2 | 128 | 9.63 |
| G. Di Natale | 3 | 111 | 8.87 |
| P. Prinetto | 4 | 516 | 55.23 |
| M. L. Bodoni | 5 | 32 | 1.16 |