Name
Abstract | ||
|---|---|---|
Cyclic Redundancy Checks (CRCs) are commonly used for their effective error-detecting capabilities in various wireless transceivers, digital networks, data storage devices, embedded designs, RFID systems, etc. The conventional clock-driven and combinational logic based CRC hardware implementations are known to consume considerable power especially those used in wireless passive devices. This paper proposes a low-power implementation of a novel serial data driven CRC for passive RFID tags. This CRC design is not explicitly clocked, but driven by the incoming encoded data as opposed to clock recovery. The associated CRC computations are done in parallel to the data decoding procedure unlike the traditional shift register implementations. Simulation results of the data driven CRC-16 design show significant reduction in power consumption and the area occupied as compared to the typical CRC-16 implementations used in RFID applications. |
Year | DOI | Venue |
|---|---|---|
2012 | 10.1166/jolpe.2012.1221 | JOURNAL OF LOW POWER ELECTRONICS |
Keywords | Field | DocType |
Low Power, CRC, Data Driven, RFID | Serial communication,Shift register,Clock recovery,Digital signal,Computer data storage,Cyclic redundancy check,Electronic engineering,Combinational logic,Engineering,Radio-frequency identification,Embedded system | Journal |
Volume | Issue | ISSN |
8 | 5 | 1546-1998 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Vyasa Sai | 1 | 6 | 2.33 |
| Ajay Ogirala | 2 | 9 | 3.73 |
| Marlin H. Mickle | 3 | 65 | 17.89 |