Name
Title | ||
|---|---|---|
An Adaptive Dynamic Scheduling Scheme for H.264/AVC Decoding on Multicore Architecture |
Abstract | ||
|---|---|---|
Parallelizing H.264/AVC decoding on multicore architectures is challenged by its inherent structural and functional dependencies at both frame and macro-block levels, as macro-blocks and certain frame types must be decoded in a sequential order. So far, dynamic scheduling scheme with recursive tail submit [1], as one of the best existing algorithms, provides a good throughput performance by exploiting macro-block level parallelism and mitigating global queue contention. Nevertheless, it fails to achieve an optimal performance due to 1) the use of global queue, which incurs substantial synchronization overhead when the number of cores increases and 2) the unawareness of cache locality with respect to the underlying hierarchical core/cache topology that results in unnecessary latency, communication cost and load imbalance. In this paper, we propose an adaptive dynamic scheduling scheme that employs multiple local queues to reduce lock contention, and assigns tasks in a cache locality aware and load-balancing fashion so that neighboring macro-blocks are preferably dispatched to nearby cores. We design, implement and evaluate our scheme on a 32-core cc-NUMA SGI server. Compared to existing alternatives by running real benchmark applications, we observe that our scheme produces higher throughput and lower latency with more balanced workload and less communication cost. |
Year | DOI | Venue |
|---|---|---|
2012 | 10.1109/ICME.2012.9 | ICME |
Keywords | Field | DocType |
existing algorithm,communication cost,cache topology,dynamic scheduling scheme,certain frame type,avc decoding,adaptive dynamic scheduling scheme,cores increase,good throughput performance,global queue,cache locality,multicore architecture,multicore processing,scheduling,load balancing,instruction sets,decoding,dynamic scheduling,parallel processing,resource allocation,topology,synchronisation,synchronization | Cache,Scheduling (computing),Computer science,Instruction set,Parallel computing,Queue,Resource allocation,Throughput,Dynamic priority scheduling,Multi-core processor,Distributed computing | Conference |
Citations | PageRank | References |
3 | 0.42 | 5 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Dung Vu | 1 | 7 | 1.90 |
| Jilong Kuang | 2 | 38 | 17.00 |
| Laxmi N. Bhuyan | 3 | 2393 | 248.44 |