Name
Title | ||
|---|---|---|
Analytical models and algorithms for the efficient signal integrity verification of inductance-effect-prominent multicoupled VLSI circuit interconnects |
Abstract | ||
|---|---|---|
Novel signal integrity verification models and algorithms for inductance-effect- prominent RLC interconnect lines are developed by using a traveling-wave-based waveform approximation (TWA) technique. The multicoupled line responses are decoupled into the eigenmodes of the system in order to exploit the TWA technique. Then, the response signals are mathematically represented by the linear combination of each eigenmode response based on TWA, followed by reporting the signal integrity models and algorithms for the multicoupled lines. The signal integrity of VLSI circuit interconnects is complicatedly correlated with input signal switching-patterns, layout geometry, and termination conditions. It is shown that the technique can be efficiently employed for complicated multicoupled interconnect lines with various termination conditions and the signal transients based on the technique have excellent agreement with SPICE simulations. Thus, with the proposed technique, the switching-dependent signal delay, crosstalk, ringing, and glitches of the inductance-effect-prominent RLC interconnect lines can be accurately as well as efficiently determined. |
Year | DOI | Venue |
|---|---|---|
2004 | 10.1109/TVLSI.2004.825836 | IEEE Trans. VLSI Syst. |
Keywords | Field | DocType |
novel signal integrity verification,spice,integrated circuit interconnections,ringing,multicoupled line response,vlsi circuit interconnects,proposed technique,multicoupled line responses,integrated circuit modelling,response signal,three-pole-based response signal,waveform analysis,rlc circuits,signal integrity verification models,multicoupled rlc lines,closed form models,system eigenmodes,circuit layout cad,multicoupled line,crosstalk,input signal switching-patterns,analytical model,glitches,inductance-effect-prominent multicoupled interconnects,vlsi,efficient signal integrity verification,switching-dependent signal delay,spice simulations,signal integrity model,integrated circuit layout,signal integrity,traveling-wave-based waveform approximation,efficient computation algorithms,eigenvalues and eigenfunctions,twa technique,inductance,coupled transmission lines,eigenmodes,mathematical model,transmission line,glitch,traveling wave,geometry,very large scale integration,approximation algorithms | Integrated circuit layout,Signal processing,Inductance,Computer science,Ringing,Waveform,Signal integrity,Algorithm,Electronic engineering,RLC circuit,Very-large-scale integration | Journal |
Volume | Issue | ISSN |
12 | 4 | 1063-8210 |
Citations | PageRank | References |
10 | 0.72 | 21 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Seongkyun Shin | 1 | 29 | 3.15 |
| Yungseon Eo | 2 | 62 | 8.67 |
| William R. Eisenstadt | 3 | 65 | 11.80 |
| Jongin Shim | 4 | 51 | 4.57 |