Name
Abstract | ||
|---|---|---|
The incessant progress in manufacturing technology is posing new challenges to microprocessor designers. Nowadays, comprehensive verification of a chip can only be performed after tape-out, when the first silicon prototypes are available. Several activities that were originally supposed to be part of the pre-silicon design phase are migrating to this post-silicon time as well. The short paper describes a post-silicon methodology that can be exploited to devise functional failing tests. Such tests are essential to analyze and debug speed paths during verification, speed-stepping, and other critical activities. The proposed methodology is based on the Genetic Programming paradigm, and exploits a versatile toolkit named μGP. The paper demonstrates that an evolutionary algorithm can successfully tackle a significant and still open industrial problem. Moreover, it shows how to take into account complex hardware characteristics and architectural details of such complex devices. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1145/2001858.2001985 | GECCO (Companion) |
Keywords | Field | DocType |
account complex hardware characteristic,evolutionary failing-test generation,critical activity,proposed methodology,comprehensive verification,complex device,modern microprocessors,short paper,architectural detail,post-silicon time,genetic programming paradigm,post-silicon methodology,chip,evolutionary algorithm | Manufacturing technology,Evolutionary algorithm,Software engineering,Computer science,Microprocessor,Real-time computing,Exploit,Chip,Genetic programming,Artificial intelligence,Machine learning,Debugging | Conference |
Citations | PageRank | References |
1 | 0.40 | 4 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Ernesto Sanchez | 1 | 4 | 1.88 |
| Giovanni Squillero | 2 | 992 | 103.07 |
| Alberto Tonda | 3 | 119 | 9.86 |