Title | ||
---|---|---|
A systematic approach to CMOS low noise amplifier design for ultrawideband applications |
Abstract | ||
---|---|---|
In this paper, we introduce a systematic method to design CMOS low noise amplifiers (LNA) for ultrawideband (UWB) applications. The proposed method is addressed to optimize noise performance and power efficiency while maintaining good input and output matching. The synthesized LNA achieves up to 14 dB power gain with a low noise figure (NF) of 2 dB and provides a reasonably acceptable input and output matching of -10 dB across the frequency range of 3∼5 GHz. The developed LNA, implemented in TSMC 0.18 μm CMOS technology, is a single-stage architecture with very low power dissipation of 9 mW with a 0.9 V supply. |
Year | DOI | Venue |
---|---|---|
2005 | 10.1109/ISCAS.2005.1465498 | ISCAS (4) |
Keywords | Field | DocType |
cmos analogue integrated circuits,2 db,power efficiency,14 db,uwb,low power dissipation single-stage architecture,9 mw,low-power electronics,0.9 v,source degenerated topology,low noise amplifier,cmos lna,input/output impedance matching,wideband amplifiers,noise performance optimization,ultrawideband amplifier,mmic amplifiers,0.18 micron,ultra wideband technology,impedance matching,3 to 5 ghz,cmos technology,noise figure,gain,low power electronics,design methodology,noise measurement,ultrawideband | Power gain,Low-noise amplifier,Noise measurement,Computer science,Noise figure,Impedance matching,Electronic engineering,CMOS,Electrical engineering,Low-power electronics,Amplifier | Conference |
ISSN | ISBN | Citations |
0271-4302 | 0-7803-8834-8 | 8 |
PageRank | References | Authors |
1.79 | 1 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Hyung-Jin Lee | 1 | 73 | 12.71 |
Dong Sam Ha | 2 | 423 | 54.45 |
Sang-sung Choi | 3 | 72 | 15.56 |