Name
Title | ||
|---|---|---|
Simulation Study Of Time-Average-Frequency Based Clock Signal Driving Systems With Embedded Digital-To-Analog Converters |
Abstract | ||
|---|---|---|
The Flying Adder (FA) architecture is one of the latest developments in the area of on-chip frequency synthesis. It has two operating modes: integer-FA mode and fractional FA mode. In the fractional FA mode, a concept of Time-Average-Frequency is used to synthesize certain frequencies that cannot be easily obtained using traditional methods. The issue of using Time-Average-Frequency to drive digital systems has been studied in previous publications by the authors. In this paper, we investigate the impact of using Time-Average-Frequency based clock signals to drive systems with embedded Digital-to-Analog Converters (DAC). |
Year | DOI | Venue |
|---|---|---|
2009 | 10.1109/ISCAS.2009.5117786 | ISCAS: 2009 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-5 |
Keywords | Field | DocType |
Time-Average-Frequency, Flying-Adder Architecture, Clock, Frequency Synthesis, DAC | Clock signal,Phase-locked loop,System on a chip,Adder,Computer science,Signal-to-noise ratio,Converters,Electronic engineering,Time–frequency analysis,Jitter,Electrical engineering | Conference |
Citations | PageRank | References |
3 | 0.51 | 4 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Liming Xiu | 1 | 103 | 14.36 |
| Chen-Wei Huang | 2 | 125 | 9.03 |
| Ping Gui | 3 | 7 | 5.13 |