Title
Optimised state assignment for asynchronous circuit synthesis
Abstract
This paper presents a new efficient optimised state assignment method for solving complete state coding (CSC) problem that operates purely at the state graph level and is applicable to a broad class of behaviors. This method has been automated and applied to a large set of asynchronous benchmarks and industrial circuits. Compared to existing techniques, this new method achieves significant improvements in terms of both circuit area and computation time.
Year
DOI
Venue
1995
10.1109/WCADM.1995.514649
ASYNC
Keywords
Field
DocType
asynchronous circuit synthesis,asynchronous benchmarks,optimised state assignment,computation time,new efficient optimised state,complete state coding,state graph level,new method,industrial circuit,circuit area,broad class,assignment method,logic circuits,logic design,signal generators,refining,power dissipation,encoding,asynchronous circuit
Logic synthesis,Asynchronous communication,Logic gate,Dissipation,Computer science,Signal generator,Electronic engineering,Electronic circuit,Computer engineering,Encoding (memory),Computation
Conference
ISBN
Citations 
PageRank 
0-8186-7098-3
8
0.83
References 
Authors
15
2
Name
Order
Citations
PageRank
C. Ykman-Couvreur1333.75
Bin Lin2735.08