Title
Minimizing concurrent test time in SoC's by balancing resource usage
Abstract
We present a novel test scheduling algorithm for embedded core-based SoC's. Given a system integrated with a set of cores and a set of test resources, we select a test for each core from a set of alternative test sets, and schedule it in a way that evenly balances the resource usage, and ultimately reduce the test application time. Furthermore, we propose a novel approach that groups the cores and assigns higher priority to those with smaller number of alternate test sets. In addition, we also extend the algorithm to allow multiple test sets selection from a set of alternatives to facilitate testing for various fault models.
Year
DOI
Venue
2002
10.1145/505306.505323
ACM Great Lakes Symposium on VLSI
Keywords
Field
DocType
novel approach,higher priority,test application time,alternative test set,concurrent test time,multiple test,novel test scheduling algorithm,resource usage,embedded core-based soc,alternate test set,test resource,system on a chip,fault model,multiple testing,system integration
Automatic test pattern generation,Computer science,Test scheduling,Real-time computing,Embedded core
Conference
ISBN
Citations 
PageRank 
1-58113-462-2
2
0.44
References 
Authors
7
3
Name
Order
Citations
PageRank
Dan Zhao118815.29
Shambhu J. Upadhyaya278169.61
Martin Margala331855.78