Abstract | ||
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The list of applications requiring high-performance computing resources is constantly growing. The cost of inter-processor communication is critical in determining the performance of massively parallel computing systems for many of these applications. This paper considers the feasibility of a commodity processor-based system which uses a free-space optical interconnect. A novel architecture, based on this technology, is presented. Analytical and simulation results based on an implementation of BSP (Bulk Synchronous Parallelism) are presented, indicating that a significant performance enhancement, over architectures using conventional interconnect technology, is possible. Copyright (C) 2004 John Wiley Sons, Ltd. |
Year | DOI | Venue |
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2004 | 10.1002/cpe.754 | CONCURRENCY AND COMPUTATION-PRACTICE & EXPERIENCE |
Keywords | DocType | Volume |
parallel, BSP, optical interconnect, sorting | Journal | 16 |
Issue | ISSN | Citations |
13 | 1532-0626 | 1 |
PageRank | References | Authors |
0.36 | 2 | 5 |
Name | Order | Citations | PageRank |
---|---|---|---|
Iain Gourlay | 1 | 52 | 5.38 |
Peter M. Dew | 2 | 158 | 29.71 |
Karim Djemame | 3 | 423 | 46.71 |
John F. Snowdon | 4 | 7 | 2.17 |
Gordon A. Russell | 5 | 1 | 0.36 |