Name
Abstract | ||
|---|---|---|
Dynamic and partial reconfiguration is a well-known technique to update the configuration of a field programmable gate array (FPGA) at runtime. Xilinx FPGAs support this feature which enables extensive research in this domain. However, until today the usage and exploitation of partial reconfiguration has a hurdle. The complex development process, as well as the required control at runtime keeps this technique away from many applications where it would be beneficial and lead to a reduction of costs and power consumption since a smaller FPGA can host more hardware modules due to a temporal partition and configuration in a time sequence. This paper shows an approach using the novel Zynq FPGA architecture from Xilinx. The partial reconfiguration is usable with a Linux realized on the dual core ARM 9 processor. A reconfigurable area provides space for accelerators which can be loaded and updated at runtime. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.1109/ReConFig.2013.6732279 | 2013 INTERNATIONAL CONFERENCE ON RECONFIGURABLE COMPUTING AND FPGAS (RECONFIG) |
Keywords | Field | DocType |
dynamic and partial reconfiguration, Zynq 7000, FPGA, ZedBoard, Linux | USable,Computer science,Parallel computing,Field-programmable gate array,Real-time computing,Fpga architecture,Hardware modules,Control reconfiguration,Reconfigurable computing,Embedded system,Power consumption | Conference |
ISSN | Citations | PageRank |
2325-6532 | 4 | 0.47 |
References | Authors | |
13 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Muhammed Al Kadi | 1 | 19 | 3.91 |
| Patrick Rudolph | 2 | 4 | 0.47 |
| Diana Göhringer | 3 | 195 | 29.34 |
| Michael Hübner | 4 | 11 | 1.62 |