Paper Info
Title
TMbox: A Flexible and Reconfigurable 16-Core Hybrid Transactional Memory System
Abstract
In this paper we present the design and implementation of TM box: An MPSoC built to explore trade-offs in multicore design space and to evaluate parallel programming proposals such as Transactional Memory (TM). Our flexible system, comprised of MIPS R3000-compatible cores is easily modifiable to study different architecture, library and operating system extensions. For this paper we evaluate a 16-core Hybrid Transactional Memory implementation based on the Tiny STM-ASF proposal on a Virtex-5 FPGA and we accelerate three benchmarks written to investigate TM.
Year
DOI
Venue
2011
10.1109/FCCM.2011.44
Field-Programmable Custom Computing Machines
Keywords
DocType
ISBN
flexible system,tiny stm-asf proposal,reconfigurable 16-core hybrid transactional,different architecture,tm box,multicore design space,memory system,mips r3000-compatible core,system extension,transactional memory,virtex-5 fpga,16-core hybrid transactional memory,multicore processing,logic design,system on chip,registers,field programmable gate array,parallel programming,operating system,hardware,field programmable gate arrays,reconfigurable computing
Conference
978-0-7695-4301-7
Citations 
PageRank 
References 
2
0.37
15
Authors
8
Name
Order
Citations
PageRank
Nehir Sonmez1132.27
Oriol Arcas2283.58
Otto Pflucker320.37
Osman S. Unsal457555.65
Adrín Cristal5121.57
Ibrahim Hur642126.49
Satnam Singh757159.08
Mateo Valero84520355.94