Title
A Class of Irredundant Encoding Techniques for Reducing Bus Power
Abstract
This paper proposes a number of encoding techniques for decreasing power dissipation on global buses. The best target for these techniques is a wide and highly capacitive memory bus. Switching activity of the bus is reduced by means of encoding the values that are conveyed over them. More precisely, three irredundant bus-encoding techniques axe presented in this paper. These techniques decrease the bus activity by as much as 86% for instruction addresses without the need to add redundant bus lines. Having no redundancy means that exercising these techniques on any existing system does not require redesign and remanufacturing of the printed circuit board of the system. The power dissipation of the encoder and decoder blocks is insignificant in comparison with the power saved on the memory address bus. This makes these techniques capable of reducing the total power consumption.
Year
DOI
Venue
2002
10.1142/S0218126602000562
JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS
Keywords
Field
DocType
low power memory systems,bus encoding,system level power optimization,microarchitecture techniques,low power design
Power-flow study,Computer science,Electronic engineering,Local bus,Slack bus,Memory bus,Memory address,System bus,Bus encoding,Control bus
Journal
Volume
Issue
ISSN
11
5
0218-1266
Citations 
PageRank 
References 
3
0.43
9
Authors
3
Name
Order
Citations
PageRank
yazdan aghaghiri1111.73
Farzan Fallah255743.73
Massoud Pedram378011211.32