Name
Title | ||
|---|---|---|
A high throughput low cost context-based adaptive arithmetic codec for multiple standards |
Abstract | ||
|---|---|---|
For next generation image compression standard, context-based arithmetic coding is adopted for improving the compression rate. An efficient and high throughput codec design is strongly required for handling high-resolution images. We propose an efficient codec architecture for context-based adaptive arithmetic coding, which exhibits low cost, low latency, and high throughput rate. In addition, it can be programmed for supporting multiple standards such as JPEG, JPEG2000, JBIG, and JBIG2 standards. It exploits three-pipeline stages architecture. Based on parallel leading zeros detection and bit-stuffing handling, symbols can be encoded and decoded within one cycle. Therefore, the throughput rate can be increased as high as the codec operating clock rate. For 0.35 μ 1P4M CMOS technology, both the encoding and decoding rate can run up to 185 M symbol/sec. The AC codec only costs 12 K gate count and 860 μm×860 μm layout area. These performances can meet high-resolution real time application requirements. |
Year | DOI | Venue |
|---|---|---|
2002 | 10.1109/ICIP.2002.1038164 | Image Processing. 2002. Proceedings. 2002 International Conference |
Keywords | Field | DocType |
CMOS digital integrated circuits,adaptive codes,arithmetic codes,code standards,codecs,data compression,decoding,digital signal processing chips,image coding,image resolution,pipeline processing,telecommunication standards,0.35 micron,1P4M CMOS technology,JBIG,JBIG2,JPEG standard,JPEG2000,bit-stuffing handling,clock rate,codec architecture,codec design,compression rate,context-based adaptive arithmetic codec,context-based arithmetic coding,decoding rate,encoding rate,high throughput adaptive arithmetic codec,high throughput codec,high-resolution images,high-resolution real time application,image compression standard,low cost codec,multiple standards,parallel leading zeros detection,symbol decoding,symbol encoding,three-pipeline stages architecture | Throughput (business),Computer science,Real-time computing,Artificial intelligence,JBIG,Computer hardware,Codec,JBIG2,Computer vision,Adaptive Multi-Rate audio codec,JPEG,Data compression,Arithmetic coding | Conference |
Volume | ISSN | Citations |
1 | 1522-4880 | 8 |
PageRank | References | Authors |
0.83 | 3 | 5 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Keng-khai Ong | 1 | 16 | 2.39 |
| Wei-Hsin Chang | 2 | 105 | 10.25 |
| Tseng-Yi Chen | 3 | 88 | 23.49 |
| Yew-san Lee | 4 | 64 | 9.24 |
| Chen-Yi Lee | 5 | 1211 | 152.40 |