Name
Abstract | ||
|---|---|---|
Intra-prediction of H.264/AVC provides great contribution to I-picture coding efficiency by predicting pixel values from adjacent pixels. But it is one of major complexity-raising sources caused ftom checking 17 candidate modes for every macroblock. This paper presents a dedicated hardware structure for intra-prediction that is designed by modifying a conventional 1-D systolic array for motion estimation. Only attaching multiplexers to it, we can obtain a systolic array that can perform both intra-prediction and inter-prediction. For parallel execution, we modify, the original intra -prediction algorithm slightly, but it does not nearly affect PSNR and the total size. Our architecture yields 10 to 40 times higher performance than that achieved by ARM-based systems, being compared by instruction counts for arithmetic operations. |
Year | Venue | Keywords |
|---|---|---|
2005 | ESA '05: PROCEEDINGS OF THE 2005 INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS AND APPLICATIONS | H.264/AVC,intra-prediction,and array architecture |
Field | DocType | Citations |
Discrete mathematics,Computer architecture,Computer science,Hardware architecture | Conference | 0 |
PageRank | References | Authors |
0.34 | 1 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Su-jin Lee | 1 | 0 | 0.34 |
| Cheong-Ghil Kim | 2 | 15 | 13.38 |
| Myoung-Seo Kim | 3 | 9 | 3.65 |
| Shin-dug Kim | 4 | 430 | 73.79 |