Name
Abstract | ||
|---|---|---|
Highly multithreaded architectures introduce another dimension to fine-grained hardware cache management. The order in which the system's threads issue instructions can significantly impact the access stream seen by the caching system. This article studies a set of economically important server applications and presents the cache-conscious wavefront scheduling (CCWS) hardware mechanism, which uses feedback from the memory system to guide the issue-level thread scheduler and shape the access pattern seen by the first-level cache. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.1109/MM.2013.24 | Micro, IEEE |
Keywords | Field | DocType |
article study,caching system,cache-conscious thread scheduling,memory system,massively multithreaded processors,first-level cache,hardware mechanism,access stream,fine-grained hardware cache management,access pattern,cache-conscious wavefront scheduling,important server application,parallel processing,computer architecture,hardware,scheduling,cache,multithreading,memory management,multi threading | Multithreading,Locality,Thread scheduling,Scheduling (computing),Cache,Computer science,Parallel computing,Real-time computing,Thread (computing),Memory management,Cache management | Journal |
Volume | Issue | ISSN |
33 | 3 | 0272-1732 |
Citations | PageRank | References |
2 | 0.38 | 9 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Timothy Rogers | 1 | 8 | 1.49 |
| Mike O'Connor | 2 | 372 | 18.55 |
| Tor M. Aamodt | 3 | 1583 | 71.91 |