Title | ||
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Integrated prepass scheduling for a Java Just-In-Time compiler on the IA-64 architecture |
Abstract | ||
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We present a new integrated prepass scheduling (IPS) algorithm for a Java Just-In-Time (JIT) compiler, which integrates register minimization into list scheduling. We use backtracking in the list scheduling when we have used up all the available registers. To reduce the overhead of backtracking, we incrementally maintain a set of candidate instructions for undoing scheduling. To maximize the ILP after undoing scheduling, we select an instruction chain with the smallest increase in the total execution time. We implemented our new algorithm in a production-level Java JIT compiler for the Intel Itanium processor. The experiment showed that, compared to the best known algorithm by Govindarajan et al., our IPS algorithm improved the performance by up to +1.8% while it reduced the compilation time for IPS by 58% on average. |
Year | DOI | Venue |
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2003 | 10.5555/776261.776279 | CGO |
Keywords | Field | DocType |
java just-in-time,production-level java jit compiler,known algorithm,compilation time,ips algorithm,new integrated prepass scheduling,list scheduling,undoing scheduling,ia-64 architecture,total execution time,new algorithm,java just-in-time compiler,just in time compiler,java | Fair-share scheduling,Instruction scheduling,Computer science,Parallel computing,Itanium,Real-time computing,Two-level scheduling,Compiler,Rate-monotonic scheduling,Just-in-time compilation,Operating system,IA-64 | Conference |
ISSN | ISBN | Citations |
2164-2397 | 0-7695-1913-X | 4 |
PageRank | References | Authors |
0.51 | 16 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Tatsushi Inagaki | 1 | 70 | 5.28 |
Hideaki Komatsu | 2 | 410 | 34.00 |
Toshio Nakatani | 3 | 741 | 56.80 |