Name
Abstract | ||
|---|---|---|
Programmable logic array (PLA) is a circuit realization for the two-level sum of products representation of a multi-output Boolean function. The current drawn by a PLA is input dependent and it makes the problem of estimating the maximum current intractable. Integrated circuit reliability and signal integrity are related to the maximum current drawn by the circuit. Hence, an estimate of the maximum current is required for the design of a reliable VLSI circuit. In this paper, we present an input pattern-independent algorithm to obtain the estimate of maximum and minimum currents drawn by a PLA over all possible input vectors. Experimental results on several benchmark circuits and comparisons with exhaustive simulations are also included in this paper. |
Year | DOI | Venue |
|---|---|---|
1998 | 10.1109/GLSV.1998.665276 | Great Lakes Symposium on VLSI |
Keywords | Field | DocType |
minimum current,programmable logic array,reliable vlsi circuit,maximum current,benchmark circuit,input pattern-independent algorithm,exhaustive simulation,circuit realization,programmable logic arrays,maximum current estimation,possible input vector,integrated circuit reliability,very large scale integration,signal integrity,energy dissipation,degradation,boolean functions,vlsi,boolean function,integrated circuit design,integrated circuit,sum of products,temperature,logic circuits | Logic gate,Computer science,Signal integrity,Programmable logic array,Electronic engineering,Integrated circuit design,Electronic circuit,Very-large-scale integration,Integrated circuit,Programmable logic device | Conference |
ISSN | ISBN | Citations |
1066-1395 | 0-8186-8409-7 | 1 |
PageRank | References | Authors |
0.48 | 1 | 2 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| S. Bobba | 1 | 110 | 16.06 |
| I. N. Hajj | 2 | 1 | 0.48 |