Paper Info
Title
A Class of Odd-Weight-Column SEC-DED-SbED Codes for Memory System Applications
Abstract
Error correcting codes are widely used in memory systems to increase reliability. Especially in a memory systern that uses byte-organized memory chips, which each contain b (≫1) output bits, a single chip failure is likely to affect many bits within a byte. Single-bit error correcting-double bit error detecting-single b-bit byte error detecting codes (SEC-DED-SbED codes) are suitable for increasing the reliability of memory system. This correspondence presents a new class of odd-weight-column SEC-DED-SbED codes for b = 4. The code length is 2r-1 - 2[r/2], where r is the number of check bits and [ ] denotes the ceiling or next largest integer. The proposed SEC-DED-S4ED codes are the best-known codes.
Year
DOI
Venue
1984
10.1109/TC.1984.5009359
IEEE Trans. Computers
Keywords
Field
DocType
memory system applications,sec-ded-sbed code,memory system,odd-weight-column sec-ded-sbed code,best-known code,memory systern,sec-ded-s4ed code,single-bit error correcting-double bit,check bit,odd-weight-column sec-ded-sbed codes,error detecting-single b-bit byte,byte-organized memory chip,reliability,probability density function,error correction,data mining
Hamming code,Concatenated error correction code,Luby transform code,Low-density parity-check code,Computer science,Turbo code,Block code,Parallel computing,Linear code,Tornado code
Journal
Volume
Issue
ISSN
33
8
0018-9340
Citations 
PageRank 
References 
19
3.00
4
Authors
1
Name
Order
Citations
PageRank
Shigeo Kaneda16926.85