Title
A Simplicial Pwl Integrated Circuit Realization
Abstract
In this paper we present a mixed-signal integrated circuit in a standard CMOS 0.5 mu m technology implementing a piecewise-linear (PWL) function with three inputs, where each input can be either analog or coded with 8 bits. The output of the circuit is a digital word with 8-bit precision, representing the value of the PWL function at the three-dimensional input. The circuit accesses also a 4 kB external memory, which is addressed with a 12-bit word. Experimental results are shown that demonstrate the circuit working up to 50 MHz with a maximum power consumption of 3.7 mW.
Year
DOI
Venue
2007
10.1109/ISCAS.2007.377901
2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11
Keywords
Field
DocType
integrated circuit,image processing,integrated circuit design,cmos technology,cmos integrated circuits,mixed signal integrated circuit,signal integrity,three dimensional,8 bit,external memory
Computer science,Circuit extraction,8-bit,12-bit,CMOS,Electronic engineering,Integrated circuit design,Mixed-signal integrated circuit,Integrated circuit,Equivalent circuit
Conference
ISSN
Citations 
PageRank 
0271-4302
5
0.63
References 
Authors
5
4
Name
Order
Citations
PageRank
Martin Di Federico1161.99
Pedro Julian2114.41
Tomaso Poggi3896.38
Marco Storace431947.42